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  • The 3rd (2003) Yamazaki-Teiichi Prize Winner Semiconductor & Semiconductor Device

The 3rd (2003) Yamazaki-Teiichi Prize Winner Semiconductor & Semiconductor Device

Development of Group IV Hetero CVD Technology and Creation of Atomically Controlled Processing

winner Winner
Jyunichi Murota
Mar. 1972 MS. in electronic engineering Hokkaido University
Apr. 1972 Musashino Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation
Mar. 1985 Associate Professor in the Laboratory for Microelectronics of the Research Institute of Electrical Communication, Tohoku University
Feb. 1995 Professor of the Laboratory for Electronic Intelligent Systems.Tohoku University

Reason for award

Research Background
The degree of integration and performance of silicon integrated circuits improves each year. To maintain this pace, minimization of MOS element channel length, thinning of gate oxidation film, introduction of gate insulation film with high dielectric ratios and development of other miniaturizing technologies are being advanced. As a result, laboratories are already engaging in trial manufacture of miniature FET transistors on the order of several tens of nm.
However, the smaller such transistors are made, the more atomic-level control becomes necessary, leading some to think that in terms of price, silicon integrated circuits are nearing their limit. Thus, instead of relying solely on miniaturization, the pursuit of next-generation ULSI is becoming ever more important to break through the aforementioned limit and boost performance by introducing types with new materials that are highly compatible with silicon and new process technology.

Candidate's Contribution
From as early as around 1980, Prof. Junichi Murota had been consistently conducting integrated research from theoretical elucidation of CVD thin-film formation processes for manufacturing silicon ULSI to the development of related devices. The making of high-quality thin film of outstanding uniformity necessitates control of a complex system in which reactions during the gaseous phase of raw gas, transport of raw gas, and surface reactions are entwined in a complex way. Specifically, amid the development of multiple CVD devices with different reactor structures and the collection of data, cases in which thin-film growth characteristics do not depend on reactor structure but are determined only by raw gas partial pressure, temperature and substrate quality have been discovered.
In connection, theoretical explanation using a Langmuir-type simple reaction-speed formula was also confirmed. Through the actualization of low-temperature-selecting epitaxial growth for Ge, it was also discovered that moisture and other impurities in the reaction environment impede the surface absorption reaction of raw gas. The SiGe heterostructure is one of the ULSI device structures currently receiving the most attention; the aforementioned results, which Prof. Murota played a leading role in, are indispensable to its actualization.
In other words, based on the aforementioned results, Prof. Murota has developed hetero CVD technology for IV-family semiconductors and, furthermore, has expanded atomic control process research. In terms of actual results, technology for high-quality SiGe-type hetero expitaxial growth at low temperatures (below 550℃) was established and applied to the world's first MOSFET obtained from a high-Ge-ratio channel (Si 0.5,Ge 0.5). As a result, carrier mobility from changes in band structure resulting from distortions in semiconductor film was improved, and heterostructure elements with fast response characteristics were actualized.
The depressurizing CVD device with high-purity hotwall that was developed for this research has been commercialized, in conjunction with a manufacturer, as a mass-production device for Si heterostructure formation.

Differentiation from Competing Technology
Competing technology includes compound semiconductor LSI, such as the technology for GaAs or GaN integrated circuits. However, in terms of degree of integration and cost, the mainstream silicon LSI (including SiGe) has a position of overwhelming dominance.

Current Status and Future Prospects
Although semiconductor devices with SiGe heterostructure have already been applied to some cellular phones, they have not yet been widely applied to general silicon LSI. However, with MOSFET gate processing dimensions slated to reach the level of 20nm around the year 2010, it is expected that the IV-family semiconductor technology based on the atomic control process technology that Prof. Murota is currently advancing will become increasingly important.